1. Fully responsible for managing the SoC and IP verification team, defining team development strategies and goals, and guiding the team to efficiently complete all verification tasks;
2. Develop scientific and reasonable team verification strategies and plans, track progress in real time, adjust resource allocation promptly to ensure smooth verification progress and achieve end‑to‑end zero‑defect tape‑out;
3. Provide clear career development directions and growth paths for team members, helping them continuously improve their professional skills;
4. Formulate precise verification strategies, comprehensive verification plans, and efficient verification environments tailored to the different characteristics of system‑level and IP‑level blocks, ensuring high‑quality completion of verification work;
5. Define verification delivery standards and key milestones, improve verification efficiency and quality, and ensure the accuracy and reliability of verification results;
6. While managing the team, actively support risk mitigation efforts to provide solid guarantee for successful project delivery.
1. 6+ years of IP/SoC verification experience, including at least 4 years of SoC verification leadership experience, with project management and team leadership capabilities.
2. Familiar with classic RISC architecture CPU cores, as well as AMBA/AXI or Tile-link bus protocols.
3. Proficient in typical verification languages, methodologies and tools, such as SV, UVM, VCS/IES, Verdi/DVE, Emulator, FunCov, Assertion, etc.
4. Familiar with basic workstation scripting languages and tools, such as Python, Perl, TCL, Shell, Makefile, and capable of efficiently building verification environments and writing automation scripts.
5. Familiar with the requirements, processes and entry/exit standards of end-to-end chip verification delivery, with excellent verification plan execution and risk management capabilities to effectively address various risks and challenges in projects.
6. Good interpersonal skills and oral English communication skills, able to drive the resolution of key issues.
7. Strong team management skills, able to formulate reasonable team goals and incentive mechanisms, and stimulate the enthusiasm and creativity of team members.
8. Preferred Qualifications:
- Experience in mass production of chips or high-performance computing (HPC/AI chip) projects.
- Good document writing skills, with experience in writing high-quality technical documents such as verification plans and verification reports.
1. Responsible for IP-level and top-level verification of SoC.
2. Conduct functional verification and behavioral model verification for module, subsystem and chip levels, ensuring the design quality of IP modules and SoC chips reaches industry-leading standards.
3. Formulate module verification strategies, plans and schedules, implement verification activities efficiently, and ensure defect-free verification delivery of modules.
4. Build verification environments, write test cases, design coverage models, execute test cases and regression tests to ensure comprehensiveness and depth of verification work.
5. Flexibly adjust testing priorities according to actual conditions, optimize verification processes, and improve verification efficiency.
6. Conduct quantitative analysis of the verification process to ensure the completeness of module verification and provide data support for subsequent verification work.
7. Assist other team members in solving technical problems.
1. Bachelor's degree or above, major in Microelectronics is preferred; solid basic knowledge of digital circuits, analog circuits, VLSI, etc.
2. 3+ years of IP/SoC verification experience, familiar with the full process and key links of chip verification, able to independently undertake module and subsystem-level verification work.
3. Familiar with RISC-V/AMBA protocols; mastery of CHI protocol is preferred.
4. Proficient in typical verification languages, methodologies and tools, such as SV, UVM, VCS/IES, Verdi/DVE, Emulator, FunCov, Assertion, etc., able to efficiently build verification environments and write test cases.
5. Familiar with basic workstation scripting languages and tools, such as Python, Perl, TCL, Shell, Makefile.
6. Familiar with the requirements, processes and entry/exit standards of module verification delivery, with good verification plan execution and risk management capabilities to effectively address various risks and challenges in projects.
7. Good interpersonal skills and oral English communication skills, able to communicate and collaborate smoothly with personnel from different departments.
8. Preferred Qualifications:
- Good document writing skills, able to write high-quality technical documents such as verification plans and verification reports.
- Experience in mass production of chips or high-performance computing (HPC/AI chip) projects.
1. Participate in chip application scenario analysis, conduct market research and competitive analysis; extract chip system requirements, and define SoC specifications and PPA requirements.
2. Participate in SoC system design, responsible for performance analysis, low-power design, IP selection, Floorplan, etc.
3. Participate in analysis and architecture definition of key subsystems, including DDR subsystem, PCIe subsystem, security subsystem, bus, etc.
4. Collaborate with front-end, back-end, verification, software and other colleagues to ensure the correct implementation of chip architecture.
1. Master's degree or above in Electronics, Communication, Computer or related majors (preferred).
2. 3+ years of IP design or SoC integration experience; 2+ years of SoC architecture design experience with successful tape-out projects.
3. Familiar with AXI bus or NoC (knowledge of coherent bus is a plus).
4. Preferred Qualifications:
- Familiar with PCIe.
- Familiar with DDR5, LPDDR5 protocols.
- Familiar with RISC-V CPU.
- Familiar with Security boot, RAS, etc.
1. Responsible for comprehensive post-silicon testing, formulate and implement test plans in accordance with project schedules, covering quality requirements, strategies, methods and resource allocation to ensure orderly testing.
2. In-depth understanding of server system architecture; familiar with BMC, BIOS and Linux OS, and understand the architecture and main functional modules of OpenBMC or Legacy BMC. Have a profound understanding of one or more of the following protocols, including but not limited to IPMI, Redfish, PCIe, CXL, I2C/I3C, eSPI, SPI, USB, MCTP (VDM, SPDM, PLDM); be good at designing reasonable and comprehensive test cases to fully verify product functions, performance and system compatibility.
3. Proficient in building test environments (including servers, related hardware equipment and various testing tools), accurately executing test cases, conducting fault analysis for problems found in testing, locating issues and cooperating with R&D teams to provide solutions.
4. Good communication skills; closely collaborate with R&D, hardware, software and other departments, timely feedback problems found in testing, jointly analyze root causes with all departments, follow up on problem resolution progress, promote continuous product optimization, and ensure on-time product delivery.
5. Keep abreast of the latest developments in post-silicon testing technologies in the industry, actively introduce advanced testing concepts and methods, continuously optimize existing testing processes and technical means, and effectively improve testing efficiency and quality.
1. Bachelor's degree or above in Electronic Information, Computer, Software Engineering, Automation or related majors; CET-4 or above.
3. 5+ years of server-related silicon or system testing experience, including but not limited to BMC FW testing, BIOS testing, Linux kernel and driver testing, system testing, etc.; experience in successful actual project testing cases is preferred.
3. In-depth understanding of server, BMC and BIOS testing architecture, familiar with their working principles and operating mechanisms, able to formulate targeted testing strategies based on architectural characteristics.
4. Proficient in one or more of the following protocols, including but not limited to IPMI, Redfish, MCTP, PCIe, I2C/I3C, eSPI, SPI, USB, CXL; able to accurately apply protocol knowledge to test case design and problem analysis to ensure product compliance and stability at the protocol level.
5. Proficient in common testing tools and programming languages such as Python, Shell, etc., able to flexibly use tools for test environment construction, automated test script writing and test data processing.
6. Solid problem analysis and solving skills, able to quickly locate root causes from complex testing phenomena and propose feasible solutions.
7. Excellent communication, coordination and teamwork skills, able to efficiently convey information and collaborate in cross-departmental cooperation to promote smooth project progress.
1. Windows Graphics Driver: Develop graphics drivers supporting different Windows versions under Windows Display Driver Model based on the company's hardware, solve customer feedback issues during chip mass production, and iteratively maintain and update graphics drivers.
2. WHQL Certification: Resolve issues encountered during graphics driver WHQL certification.
3. UEFI GOP Driver: Maintain and update existing GOP drivers, and solve customer feedback issues.
4. UEFI Function Development: Develop relevant functions according to customer requirements and complete function customization for different BIOS.
1. Bachelor's degree or above in Computer, Electronic Engineering, Microelectronics or related majors.
2. 5+ years of relevant work experience, including 3+ years of UEFI development experience and Windows graphics driver development experience.
3. Familiar with x86 chip architecture and specifications, Windows Driver Framework and WDDM; master common Windows driver tools and debugging methods, and familiar with driver development in UEFI environment.
4. Good communication skills, able to smoothly discuss technical solutions and problems with different departments.
5. Able to quickly learn new technologies and apply them to actual development.
1. Responsible for Linux driver development and debugging of peripherals such as UART, I2C, I3C, SPI, PWM, CAN, eMMC, UFS, USB, etc.
2. Responsible for the upstream work of Linux drivers related to the company's SoC products.
3. Responsible for the maintenance of relevant Linux drivers and support for new customer requirements.
4. Optimize product performance and solve peripheral compatibility issues.
1. Bachelor's degree or above in Computer, Electronic Engineering, Microelectronics or related majors.
2. 2+ years of Linux driver development experience.
3. Familiar with Linux device driver model, kernel interrupt mechanism and other kernel modules.
4. Familiar with ARM/RISC-V chip architecture and specifications, and understand the working principles of peripheral hardware.
5. Familiar with software development processes, with experience in version control tools such as Git.
6. Understand the open-source code upstream process; experience in Linux kernel code upstream is preferred.
1. Responsible for circuit design of specific CPU modules, such as execution units.
2. Cooperate with DV team to complete functional convergence.
3. Collaborate with the architecture team on microarchitecture iteration, and optimize PPA to meet design requirements.
1. Proficient in RTL coding, and master HDL languages such as SystemVerilog.
2. Master necessary EDA tools, and proficiently use Linux environment and scripts to complete required development work.
3. Basic understanding of computer architecture, especially basic CPU structures such as pipeline and out-of-order execution.
4. Able to work in a team, and effectively cooperate with DV and architecture teams for debugging and PPA iteration.
5. Self-motivated, willing to think, serious in attitude, courageous to delve into difficult problems.
1. Responsible for the full-process verification of high-performance RISC-V CPU IP, ensuring chip functions and performance meet design specifications.
2. Collaborate deeply with architecture and design teams to conduct functional verification and performance tuning for core modules such as CPU instruction set, pipeline, cache and bus.
3. Participate in building, debugging and maintaining multi-level verification platforms (module level / subsystem level / system level) to support efficient simulation and problem location.
4. Formulate verification plans, design and implement test cases covering functions, performance and boundary scenarios, complete problem debugging, coverage analysis and convergence.
5. Participate in the design and development of instruction generators, build automated random testing capabilities, and improve verification efficiency and completeness.
1. 3+ years of CPU R&D/verification experience; expertise in processor verification is preferred.
2. Proficient in general-purpose processor architecture; familiar with RISC-V instruction set architecture (RV32/RV64) and related ecosystems is preferred.
3. Proficient in SystemVerilog, UVM verification methodology and SVA assertion verification technology, with the ability to develop complex verification environments.
4. Experience in Formal Verification, hardware emulation acceleration (Emulation) or FPGA prototype verification is preferred.
5. Excellent cross-team collaboration skills and problem-driven communication skills, able to efficiently promote problem resolution and project implementation.
1. Responsible for the maintenance and upgrade of compiler toolchains.
2. Responsible for performance analysis, identify performance bottlenecks and implement compiler optimizations.
3. Compiler back-end optimization based on chip microarchitecture.
4. Develop efficiency tools to improve performance analysis and positioning efficiency.
1. Major in Computer, Software Engineering or related fields.
2. Familiar with C/C++, operating system principles and computer architecture, and familiar with Linux working environment.
3. Master basic knowledge of compiler principles.
4. Good problem analysis and positioning skills.
1. Collaborate with SoC design, hardware and software teams to conduct verification before and after chip tape-out.
2. Develop SoC module drivers and test programs under bare-metal or Real-Time Operating System (RTOS).
3. Maintain and optimize firmware of existing products.
4. Develop and deliver SoC or module firmware.
5. Port algorithm C code to embedded systems.
6. Write clear, readable and robust code and documentation.
7. Guide junior firmware engineers to ensure smooth project completion.
1. Bachelor's degree or above, or equivalent practical experience; Master's degree in Electronic Engineering, Computer is preferred.
2. 5+ years of embedded software development experience.
3. Proficient in C/C++ programming, and able to use embedded development tools such as GDB, OpenOCD.
4. Experience in ARM/RISC-V architecture development.
5. Familiar with common SoC peripheral interfaces and related protocols, such as UART, I2C, SPI, USB, SDIO, etc.
6. Strong problem-solving, teamwork and self-driven abilities.
7. Excellent Chinese and English communication skills.
8. Preferred Qualifications:
- Experience in RTOS/Linux/UEFI porting and driver development.
- Programming experience in Shell/Perl/Python.
- Familiar with software version control systems, especially Git.
- Development experience in high-speed components such as PCIe, USB, DDR, and familiar with related interfaces and protocols.
1. Responsible for sales of RISC-V IP and NoC IP.
2. Responsible for maintaining key customers.
3. Assist in collecting market and industry information.
4. Explore new markets, develop new customers, and expand the customer base.
1. Bachelor's degree or above; engineering background in Microelectronics, Electronic Engineering is preferred.
2. 5+ years of sales experience in IP, design services, EDA or other semiconductor-related fields, familiar with industry sales models and rules.
3. Strong independent working ability, good communication skills, and able to work under pressure.
4. High initiative and execution ability, with motivation.
5. Serious working attitude, strong sense of responsibility, good learning ability and teamwork spirit.
1. Responsible for sales of the company’s chips, modules, hardware-related products.
2. Responsible for submitting Forecast regularly as required by the company, and providing strong data support for Forecast.
3. Responsible for mining and maintaining key customers, and continuously developing new customers.
4. Responsible for market analysis of competitive products, and submitting Market Segment Report.
5. Provide customized solutions according to customer needs, and promote project progress and delivery.
1. Bachelor's degree or above in Electronics, Microelectronics or related science and engineering majors.
2. 1+ year of sales experience in the semiconductor industry, familiar with industry sales models and rules.
3. Experience in sales of open-source hardware and industrial intelligent products is preferred.
4. Experience in key account sales is preferred.
5. Familiarity with overseas markets is preferred.
1. Provide customers with BMC firmware/software debugging and system integration guidance.
2. Analyze and solve BMC-related problems encountered by customers in R&D, testing and mass production (such as power management, thermal management, IPMI protocol, system boot, sensor monitoring, etc.).
3. Lead customer technical discussions, provide solutions and drive problem closure.
4. Feedback customer needs and market trends, and drive internal product improvement.
5. Compile technical cases, debugging guides and FAQ libraries.
1. Bachelor's degree or above; major in Computer Science, Electronic Information or related science and engineering is preferred.
2. 3-5+ years of BMC firmware development or technical support experience in servers or embedded systems.
3. In-depth understanding and experience in porting, development and debugging of OpenBMC open-source firmware.
4. Familiar with the boot process and driver model of U-Boot and Linux Kernel.
5. Familiar with BMC-related debugging tools (such as BMC Web interface, ipmitool, Redfish API, Linux kernel debugging tools).
6. Familiar with x86 server platform architecture, and understand the interaction mechanism between BMC and Intel/AMD servers (such as eSPI, I3C, MCTP, PFR, Secure Boot, OOB management, etc.).
7. Familiar with server management features such as ACD, ASD, Node Manager, iHDT, APML, etc.
8. Serious working attitude, strong sense of responsibility, good learning ability and teamwork spirit.
1. Responsible for business expansion of the company’s gateway products in industries such as smart industry, microgrid, industrial internet and smart city, and actively develop key customers.
2. Responsible for analysis of relevant segmented markets and customer needs.
3. Lead and promote the mass production and implementation of key customer projects.
1. Bachelor's degree or above in Electronics, Computer or related science and engineering majors.
2. 5+ years of experience in marketing/BD/sales.
3. Experience in sales of gateways, DTU and other equipment and customer resources.
4. Familiarity with smart industry, microgrid, industrial internet, smart city and other fields is preferred.
5. Familiarity with ARM/Linux/OT and other technical platforms is preferred.
6. Good English reading and writing skills is preferred.
7. Proactive, strong execution ability, good pressure resistance and self-breakthrough spirit.